1. Field of the Invention
The present invention relates to a field-effect transistor with a trench isolation structure and a method for the manufacturing the same and, more specifically, a field-effect transistor with a field insulation film formed by the use of the LOCOS method and a field-effect transistor with a trench isolation structure such as, e.g., a trench DRAM cell, and the present invention also relates to a method for manufacturing the above-mentioned field-effect transistors.
2. Related Art
In the case of forming an element isolation region of a semiconductor device, the trench isolation method suited for microstructuring has so far been used. FIGS. 1A to 1E are sectional views showing this trench isolation method in the order of the manufacturing steps thereof. As shown in FIG. 1A, a silicon oxide film 6 is formed on a silicon substrate 3, and a silicon nitride film 5 is formed on this silicon oxide film 6. Further, those portions of the silicon oxide film 6 and the silicon nitride film 5 which lie at the position at which a trench isolation portion is to be formed are selectively removed.
Further, as shown in FIG. 1B, by the use of the silicon nitride film 5 and the silicon oxide film 6 as a mask, the silicon substrate 3 is etched to thereby form a trench 7 in the silicon substrate 3.
Thereafter, as shown in FIG. 1C, the silicon nitride film 5 and the silicon oxide film 6 are removed, and then, an insulation film 2 for element separation is formed in a state buried in the trench 7.
Subsequently, as shown in FIG. 1D, an oxide film 30 is formed over the whole surface, and thereafter, a gate electrode film 1 is formed over the whole surface as shown in FIG. 1E.
Further, there is pointed out an element isolation method based on the LOCOS (LOCAL OXIDATION OF SILICON) method which is less suited, than the trench isolation method, for microstructuring but comprises simpler manufacturing steps.
FIGS. 2A to 2D are sectional views showing, in the order of manufacturing steps, the element isolation method based on this LOCOS method. As shown in FIG. 2A, on a silicon substrate 3, silicon oxide film 6 and a silicon nitride film 5 are formed, and those portions of the silicon oxide film 6 and the silicon nitride film 5 which lie at the positions at which element isolation portions are to be formed are selectively removed to expose the surface of the substrate.
Subsequently, as shown in FIG. 2B, the surface of the substrate is oxidized by using the silicon nitride film 5 as a mask, whereby a silicon oxide film 31 is formed on the substrate surface, which film is used as element isolation portions.
Thereafter, as shown in FIG. 2C, the silicon oxide film 6 and the silicon nitride film 5 are removed, and element regions 32 are formed between the portions of the silicon oxide film 31.
Subsequently, as shown in FIG. 2D, gate insulation films 33 are formed, and thereafter, a gate electrode film 1 is formed.
In the case of forming an insulation film by oxidation as stated above, when no pattern of, e.g., an insulation film exists on the silicon substrate, oxygen is uniformly fed from the surface of the silicon substrate, whereby an oxide film with a uniform thickness is formed. However, in case the pattern of an insulation film exists on the silicon substrate, the feed of oxygen from the surface of the silicon substrate is not effected uniformly, and thus, the portion of the oxide film which lies in the vicinity of the end of said pattern becomes thin.
FIGS. 3A to 3F are sectional views showing the method for manufacturing a trench DRAM in the order of the manufacturing steps thereof. As shown in FIG. 3A, a substrate plate electrode 16 is formed on the surface of a silicon substrate 3, and further, a field insulation film 19, a silicon oxide film 14, a silicon nitride film 13 and a silicon oxide film 12 are formed. Thereafter, a trench 20 is formed, and, in that portion of the inner surface of said trench 20 which lies below the substrate plate electrode 16, a capacitance electrode 17 and a capacitance insulation film 18 are formed by lamination or stacking, and, on the side surface of the field insulation film 19, a silicon oxide film 15 is formed.
Subsequently, as shown in FIG. 3B, a silicon film 21 is formed in a state buried in the trench 20, and, as shown in FIG. 3C, the portion of the silicon film 21 which lies on the silicon oxide film 12 is removed. As a result, a storage electrode made of the silicon film 22 formed of silicon is left in the trench 20.
Next, as shown in FIG. 3D, the silicon oxide film 12 is removed, and thereafter, in order to isolate the storage electrode made of the silicon film 22 formed of silicon which contains an impurity from a gate electrode made of the silicon film 22 of a transfer gate of the adjacent cell, the upper portion of the storage electrode 24 is oxidized to form an oxide film 34.
Thereafter, as shown in FIG. 3E, the silicon nitride film 13 and the silicon oxide film 14 are removed, and thereafter, a gate insulation film 25 is formed, a gate electrode 24 and a side-wall insulation film 26 are formed, and further, source-drain regions 27 are formed.
Subsequently, as shown in FIG. 3F, an electrode 28 is formed on the silicon oxide film 15.
On the other hand, in Patent Application Laid-Open No. 7-94503, there is disclosed a method according to which, before oxidizing the substrate surface, an impurity is implanted into a silicon substrate to control the thickness of the oxide film. More specifically, according to the method disclosed in this Patent Application Laid-Open No. 7-94503, nitrogen ions and argon ions are implanted into the silicon substrate, and thereafter, the surface of the silicon substrate is thermally oxidized, whereby the oxidation rate is controlled. As shown in FIG. 10, if the amount of the impurity implanted into the silicon substrate is increased, then the thickness of the resulting oxide film can be changed.
The gate insulation film 30 of a field-effect transistor using a trench isolation structure (See FIGS. 1A to 1E) has no bird's beak, and, during the oxidation, oxygen is not uniformly fed from the surface of the silicon substrate, and thus, the portion of the gate insulation film which lies in the vicinity of the end of the trench isolation portion becomes thin. As a result, the breakdown voltage of the oxide film in the vicinity of the end of the trench isolation portion is deteriorated as compared with that of the expected oxide film thickness, thereby the reliability of the oxide film being deteriorated.
In case the element separation portion is formed by the use of the LOCOS (LOCAL OXIDATION OF SILICON) based on thermal oxidation (See FIGS. 2A to 2D), the thickness of that portion of the gate insulation film 33 which lies in the vicinity of the end of the element separation portion becomes greater than the center portion of the gate insulation film due to the bird's beak (the end of the silicon oxide film 31) and never become smaller than the thickness of the design-wise expected insulation film thickness. As a result, the breakdown voltage of the insulation film does not become worse than the breakdown voltage of the insulation film with an expected thickness. However, in case a field-effect transistor is more microstructured, it becomes difficult to form a narrow element region 32 due to the bird's beak.
Further, in a trench DRAM cell (see FIGS. 3A to 3F), in the case of isolating the storage electrode 22 comprising silicon which contains an impurity from the gate electrode 24 of the transfer gate of the adjacent cell, the upper portion of the storage electrode made of the silicon film 22 is oxidized to form the silicon oxide film 34 (See FIG. 3D). In this case, oxygen is not uniformly fed, and thus, the thickness of that portion of the oxide film 34 which lies in the vicinity of the end of the element separation portion becomes thin. As a result, the isolation breakdown voltage become worse as compared with the reliability of the expected oxide film thickness.
On the other hand, in the case of the method according to which, before the oxidation is performed, an impurity is implanted into the silicon substrate to thereby control the oxide film thickness (Patent Application Laid-Open No. 7-94503), if the amount of the impurity implanted into the silicon substrate is increased, then the quality of the resulting oxide film is deteriorated and thus cannot be used under a high-density condition as described in the above-mentioned Patent Application Laid-Open No. 7-94503.